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| a FEATURES Precision Voltage Monitor (4.31 V) Watchdog Timeout Monitor Selectable Watchdog Timeout--0.75 ms, 1.5 ms, 12.5 ms, 25 ms Two RESET Outputs APPLICATIONS Microprocessor Systems Computers Printers Controllers Intelligent Instruments Power Supply and Watchdog Timer Monitoring Circuit ADM9690 FUNCTIONAL BLOCK DIAGRAM VCC VMON 4.31V ADM9690 OSC SEL1 OSC SEL2 WATCHDOG TIMEBASE RESET(1) TIMER RESET(2) TIMER RESET(1) RESET(2) WATCHDOG INPUT (WDI) WATCHDOG TRANSITION DETECTOR GND GENERAL DESCRIPTION The ADM9690 contains a voltage monitoring comparator and a watchdog timer monitor. It is designed to monitor the 5 V power supply to a microprocessor and the microprocessor operation via a watchdog function. The voltage monitoring comparator monitors the voltage on VMON. If it drops outside tolerance, as will happen during a power-fail, two reset signals are generated. Both reset signals go active (low) simultaneously. They will remain active while VMON is below the threshold, and for 50 ms (RESET(1)) or 60 ms (RESET(2)) after VMON climbs above the reset threshold. RESET(1) is intended to provide a power-on reset signal for the P while RESET(2) is used to hold additional circuitry in a reset state until the P has regained control following a power-up. The voltage monitoring circuitry remains operational with VCC as low as 2 V. The watchdog timer monitoring circuit is designed to monitor the activity on the WDI input. This input is normally connected to an output line on the P. Its function is to check that the microprocessor has not stalled in an infinite loop. If there is a period of inactivity for the watchdog timeout period, both reset outputs are activated. As above, RESET(1) remains low for 50 ms while RESET(2) remains low for an additional 10 ms. The watchdog timer is restarted when RESET(1) goes inactive. The actual watchdog timeout period is adjustable using two select inputs SEL1 and SEL2. The ADM9690 is available in an 8-lead SOIC package. It is specified over the industrial temperature range. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2000 ADM9690-SPECIFICATIONS (V Parameter VCC OPERATING VOLTAGE RANGE SUPPLY CURRENT RESET AND WATCHDOG TIMER Reset Voltage Threshold Reset Threshold Hysteresis Reset Timeout Delay (t1) RESET(2) Timeout Delay (t2) WATCHDOG TIMEOUT PERIOD (TWD) CC = Full Operating Range. TA = TMIN to TMAX unless otherwise noted) Typ Max 5.5 55 100 4.42 75 15 1.28 2.4 19 38 0.4 0.4 0.7 Units V A V mV ms ms ms ms ms ms ns V V V V V V A A A A VMON Falling TA = 0C to +70C Figure 7, 8 Figure 7, 8 SEL2 = 0, SEL1 = 0 SEL2 = 0, SEL1 = 1 SEL2 = 1, SEL1 = 0 SEL2 = 1, SEL1 = 1 VIL = 0.4, VIH = 3.5 V ISINK = 3.2 mA ISINK = 10 mA, ISINK = 15 mA, ISOURCE = 1 A 150 ns Pulse 150 ns Pulse WDI = VCC WDI = 0 V SEL = VCC SEL = 0 V Test Conditions/Comments Min 4.3 4.2 4.31 30 50 10 0.75 1.5 12.5 25 0.1 0.3 0.45 0.4 1.0 9.0 18 100 WDI INPUT PULSEWIDTH RESET(1)/(2) Output Voltage 3.5 WDI INPUT THRESHOLD Logic Low Logic High WDI Input Current SEL1/2 Input Current Specifications subject to change without notice. 0.8 3.5 -5 -1 -10 1.2 -1.2 -5 5 +1 10 -2- REV. A ADM9690 ABSOLUTE MAXIMUM RATINGS* (TA = +25C unless otherwise noted) PIN FUNCTION DESCRIPTIONS VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +6 V VMON . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VCC + 0.3 V Input Current VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . 200 mA Power Dissipation, R-8 SOIC . . . . . . . . . . . . . . . . . . 400 mW JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 120C/W Industrial (A Version) . . . . . . . . . . . . . . . . . . -40C to +85C Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300C Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . +220C Storage Temperature Range . . . . . . . . . . . . -65C to +150C ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 kV *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum ratings for extended periods of time may affect device reliability. Mnemonic VCC VMON GND RESET(1) Function Power Supply Input; +5 V. Voltage Monitoring Input. 0 V. Ground reference for all signals. Logic Output. RESET(1) goes low if VMON falls below the Reset Threshold or the Watchdog timer is not serviced within its timeout period. The reset threshold is typically 4.4 V for the ADM9690. RESET(1) remains low for 50 ms after VCC returns above the threshold. RESET(1) also goes low for 50 ms if the Watchdog Timer is not serviced within its timeout period. Logic Output. RESET(2) goes low simultaneously with RESET(1) but remains low for an additional 10 ms. Watchdog Input. If an edge is not detected on WDI within the selectable watchdog timeout period, RESET(1) and RESET(2) are forced low for their respective timeout periods. The watchdog timer restarts with each positive or negative going transition on the WDI line. Following a reset it is restarted when RESET(1) goes inactive (high). The Watchdog Timer may be disabled if WDI is left floating or is driven to midsupply. Watchdog Timeout selection inputs. Refer to Table I. RESET(2) WDI ORDERING GUIDE Model ADM9690AR Temperature Range -40C to +85C Package Description 8-Lead Narrow Body SOIC Package Option SO-8 PIN CONFIGURATION SEL1, 2 VMON 1 GND 2 8 VCC 7 RESET(1) TOP VIEW SEL1 3 (Not to Scale) 6 RESET(2) SEL2 4 5 WDI ADM9690 REV. A -3- ADM9690 -Typical Performance Curves WATCHDOG AND RESET TIMEOUT PERIOD - ms 100 VCC RESET2/TIMEOUT RESET1/TIMEOUT WATCHDOG TIMEOUT PERIOD RESET CH1 1.0V CH2 1.0V M 500ms CH1 380mV 10 2.5 3.0 3.5 4.0 4.5 5.0 VCC - Volts 5.5 6.0 6.5 Figure 1. Reset Output Voltage vs. Supply Figure 3. Watchdog and Reset Timeout Period vs. Supply @ -40C 72.0 71.6 71.2 70.8 70.4 70.0 69.6 69.2 68.8 -60 4.412 RESET VOLTAGE THRESHOLD - Volts 4.408 4.406 4.404 4.402 4.400 4.398 4.396 -60 BATTERY SUPPLY CURRENT - A 4.410 -30 0 30 60 TEMPERATURE - C 90 120 -30 0 30 60 TEMPERATURE - C 90 120 Figure 2. Reset Voltage Threshold vs. Temperature +5V Figure 4. Supply Current vs. Temperature VMON 4.31V OSC SEL1 OSC SEL2 WATCHDOG TIMEBASE VCC AUXILIARY CIRCUITRY RESET RESET(2) TIMER RESET(1) TIMER WATCHDOG TRANSITION DETECTOR RESET(2) RESET(1) RESET WATCHDOG INPUT (WDI) P I/O LINE ADM9690 GND Figure 5. Typical Application Circuit -4- REV. A ADM9690 POWER SUPPLY AND WATCHDOG MONITORING CIRCUIT The ADM9690 contains a power supply voltage monitoring comparator and a watchdog timer monitor. Either VMON dropping outside tolerance or the watchdog timer timing out results in a reset sequence as discussed below. Two reset outputs are provided. RESET(1) and RESET(2). POWER FAIL/POWER-ON RESET provide a power-on reset signal for the P while RESET(2) is used to hold additional circuitry in a reset state until the P has regained control following a power-up. The guaranteed minimum and maximum thresholds for the ADM9690 are 4.3 V and 4.5 V. Watchdog Timer RESET When VMON falls below the reset threshold (4.4 V) both RESET outputs are forced low immediately. On power-up, RESET(1) will remain low for 50 milliseconds after VMON rises above the reset threshold. This provides a power-on reset for the microprocessor. RESET(2) remains active low for an additional 10 ms. RESET(1) is intended to VCC The watchdog timer circuit monitors the activity of the microprocessor in order to check that it is not stalled in an infinite loop. An output line on the processor may be used to toggle the Watchdog Input (WDI) line. If this line is not toggled within the selected timeout period, both RESET outputs are taken active (low). RESET(1) remains low for 50 ms and RESET(2) remains low for an additional 10 ms . Each transition (either positive-going or negative-going) of WDI after RESET(1) has gone inactive restarts the watchdog timer. The actual watchdog timeout period is adjustable using SEL1 and SEL2. Four timeout periods are selectable. Please refer to Table I. The watchdog timer is restarted at the end of RESET(1) (RESET(1) going high), whether the reset was caused by lack of activity on WDI or by VMON falling below the reset threshold. VMON 4.31V ADM9690 OSC SEL1 OSC SEL2 WATCHDOG TIMEBASE RESET(1) TIMER RESET(2) TIMER RESET(1) RESET(2) Table I. WATCHDOG INPUT (WDI) WATCHDOG TRANSITION DETECTOR SEL2 GND SEL1 0 1 0 1 Watchdog Timeout Period tWD (ms) 0.75 1.5 12.5 25 Figure 6. Functional Block Diagram 0 0 1 1 VMON WDI t WD t1 t1 RESET(1) RESET(1) t2 RESET(2) t2 RESET(2) Figure 7. Power-On RESET Timing Figure 8. Watchdog RESET Timing REV. A -5- ADM9690 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Narrow Body SOIC (SO-8) C3135a-1.5-3/00 (rev. A) 0.1968 (5.00) 0.1890 (4.80) 8 1 5 4 0.1574 (4.00) 0.1497 (3.80) 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.0098 (0.25) 0.0040 (0.10) 0.0688 (1.75) 0.0532 (1.35) 0.0196 (0.50) x 45 0.0099 (0.25) SEATING PLANE 0.0500 0.0192 (0.49) (1.27) 0.0138 (0.35) BSC 0.0098 (0.25) 0.0075 (0.19) 8 0 0.0500 (1.27) 0.0160 (0.41) -6- REV. A PRINTED IN U.S.A. |
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